3D ASIP… 12 years and going strong

The 12th annual 3D Architectures for Semiconductor Integration and Packaging, or 3D ASIP as it has become known, will be held December 15-17, 2015, at the Sofitel San Francisco Bay Hotel in Redwood City, Ca. It is the longest running conference on 2.5 / 3DIC focused on commercialization and infrastructure.  

The conference general chair and program coordinator is Dr. Philip Garrou, Microelectronics Consultants of NC, who has served as technical co-chair for many years.  The technical co-chairs this year will be Professor Mitsumasa Koyanagi, Tohoku University, and Dr. Rama Alapati, director of packaging product management, GLOBALFOUNDRIES.

Matt Lueck of RTI International and Herb Reiter of EDA2ASIC Consultants have developed two half-day tutorials focused on temporary bonding/debonding and interposer design respectively. Presenters from CEA-Leti, HD Micro, Dow, TOK, Brewer Science, SUSS MicroTec and TOK will discuss the current state of the art in bonding and debonding technologies. The interposer design program includes presentations from Mentor Graphics, Cadence Design Systems, Ansys, E-System Design, Zuke, and eSilicon.  

 “This year 3D ASIP will honor two trailblazers in 3DIC,” said Dr. Garrou. “Dr. Peter Ramm, Fraunhofer EMFT and Professor Mitsumasa Koyanagi, Tohoku University will be honored for their early pioneering work in the 1990s that set the stage for what we today know as 3DIC, including TSV, thinning, and bonding.” Following the award ceremony, each recipient will deliver a short presentation on his group’s early work in 3DIC.

Mitsumasa Koyanagi	Peter Ramm

Plenary presentations will be delivered by Brandon Prior, Prismark, discussing the status of 2.5/3D and other high density technologies;  Rozalia Beica, Yole Développement, comparing and contrasting the new 3D memory architectures; and Beth Keser, Qualcomm, reviewing fan out WLP technology as an option to 2.5D.   

Brandon Prior	Rozalia Beica	Beth Kesser

The nine invited sessions cover topics including: Memory Stacks Become Reality, Products and Production in the 2.5/3D Infrastructure, Equipment and Metrology, High Density Packaging without TSV, and Heterogeneous Integration.

Key presentations will include Hynix, Micron, Tezzaron and Toshiba discussing their new 3D stacked memory products; Xilinx/SPIL, Amkor and TSMC discussing their non TSV high density solutions; AMD discussing the commercialization of Fiji graphics modules with HBM memory stacks. Dan Green of DARPA discussing their DAHI heterogeneous integration 3D platform and Sony discussing their new stacked image sensor technology. 

Registration is open. For more information on the conference agenda, speakers, and sponsorship / exhibit opportunities, visit the conference website at www.3dasip.org. 

About 3D ASIP

3D ASIP is the longest running conference series on this topic. With invited speakers and participants from leading infrastructure and supplier companies around the world, the conference aims to provide information critical to planning ongoing and future business and technical efforts impacted by 2.5/3D developments and opportunities.

Source: www.3dasip.org