At this year’s Open Compute Project (OCP) Global Summit, Samsung’s Advanced Packaging Team presented a vision for a more integrated future of High Bandwidth Memory (HBM) designs. The presentation included an overview of Samsung’s HBM packaging, encompassing both 2.5D and 3D solutions, and briefly underscored the growing importance of photonics in the context of escalating costs associated with semiconductor miniaturization. As HBM continues to evolve, photonics is expected to address the challenges of heat dissipation and transistor density.
Photonics, based on a technology that encodes information in individual photons (particles/waves of light), not only significantly reduces power consumption but also enhances processing speeds. Due to its numerous advantageous properties for the current computing landscape, semiconductor giants like Intel, AMD, TSMC, Nvidia, and Broadcom have all actively engaged in photonics research in recent years. According to Tom’s Hardware, the industry has made considerable progress in integrating photonics with HBM through two main approaches.
The first approach involves placing a photonic interlayer between the base packaging layer and the top layer, which contains HBM and logic chips like GPUs, acting as a communication layer between them. This design requires an interlayer and utilizes photonic I/O configurations to locally interface HBM and logic chips. The second approach completely separates the HBM from the chip packaging, eliminating the complexity of dealing with interlayer chip packaging. It connects the HBM to logic chips through photonics, simplifying the manufacturing and packaging costs of HBM and logic chips, and eliminating the need for complex in-circuit digital-to-optical local conversions.
While the second method appears more advantageous on the surface, it also implies a deeper reshaping of server specifications, potentially leading to HBM memory being mounted on designated photonic interfaces. Assuming standardized communication interfaces are established, HBM memory could become an “upgradeable” component, handled much like current memory modules.