- Stellar SR6 P and G series, the scalable integration processing platform targeting high-end body and drivetrain domain and zone controllers, are now available along with virtual platform models for software development
- Stellar Integration MCUs enable advanced vehicle electronic architectures, running multiple independent applications on one device
- Address safety critical applications up to ISO 26262 ASIL-D and allow efficient Over-The-Air reprogramming with sizeable memory savings
STMicroelectronics, a global semiconductor leader serving customers across the spectrum of electronics applications, has begun delivering the first Stellar SR6 automotive microcontrollers (MCUs) for automotive-industry leaders to realize the next generation of advanced vehicle electronics that deliver new levels of performance and safety.
The Stellar SR6 scalable MCU family, targeting production in 2024, is architected for high performing and efficient vehicle platforms. The MCUs are particularly suited to domain and zone controllers that simplify vehicle wiring, enable migration to software-defined platforms for greater flexibility and richer features, and increase system reliability.
“Working with lead customers, we have successfully tested the innovations in our game-changing Stellar SR6 MCUs and have now achieved the milestone of supplying the first devices to new road-car projects scheduled for production,” said Marco Monti, President, Automotive and Discrete, STMicroelectronics. “These MCUs are critical enablers for tomorrow’s smart, connected vehicles that aim to be safer, more sustainable, and deliver more rewarding user experiences while allowing car makers and their selected partners to strengthen customer relationships with value-added services.”
Stellar SR6 MCUs leverage ST’s robust FD-SOI process technology, which has excellent Soft Error Rate (SER) immunity to ensure high system reliability and availability for ISO 26262 functional-safety applications up to ASIL-D. The devices feature hardware-based virtualization, which allows multiple software applications to coexist safely while preserving performance and ensuring real-time determinism and enhances flexibility for designers by allowing multiple independent applications or virtual Electronic Control Units (ECUs) in the same physical MCU.
The first Stellar SR6 P and G series MCUs have up to 20Mbytes of robust Phase-Change Memory (PCM), which ensures high performance and data retention and is compliant with AEC-Q100 Grade 0. Stellar’s innovative dual-image storage enables efficient Over-The-Air (OTA) reprogramming with major savings in memory size through an ST innovation that supports configuring the PCM cell structure to double the memory size during OTA updates, up to 2x 20MBytes. PCM access time is also faster than other non-volatile memories such as 1T (single-transistor) NOR Flash.
The Stellar SR6 MCU family contains two series, P and G, based on the same platform.
Stellar P Integration MCU series is designed to meet the demands of next-generation drivetrain and electrification integration/domain systems, delivering powerful real-time performance and determinism for superior driving experiences and safety.
Stellar G Integration MCUs feature efficient accelerators for secure data routing via CAN, LIN, and Ethernet networks and deliver a large set of communication interfaces. With their flexible low-power modes supporting low quiescent current and an intelligent monitoring subsystem, Stellar G microcontrollers ensure the best overall power efficiency.
Each is tailored for the intended domain to offer optimized and rational solutions for next-generation vehicle needs.
Further Technical information:
The Stellar SR6 high-performance architecture meets the automotive industry’s requirements for high performance, determinism, flexibility, safety, and security with features including:
- Six Arm® Cortex®-R52 cores with lockstep and split/lock capabilities ready to meet ISO 26262 ASIL-D requirements;
- Highly efficient software separation platform for application integration: embedded virtualization through Cortex-R52 hypervisor privilege level, hypervisor and application Virtual Machine ID (VMID) based resource access protection at all levels of the architecture (mainly core MPU, network-on-chip firewalls);
- On-chip PCM with high performance and features including single-bit alterability that enhances performance and prevents single-bit failures, enabling innovative approaches to application design (by unifying both NVM and RAM features) and native support for EEPROM;
- eMMC (embedded MultiMediaCard) and Hyperbus™ interfaces to external memory;
- Three Arm Cortex-M4 cores with floating-point arithmetic unit and DSP extensions for application-specific acceleration and security subsystem;
- Hardware Security Module (HSM) with full support for EVITA (E-safety Vehicle Intrusion Protected Applications) cyber-protection architecture. The HSMs combine with multi-bus routing to protect connectivity to time-sensitive vehicle networks (Ethernet, CAN-FD, LIN);
- Dedicated encryption accelerators for MACsec (Media Access Control security protocol), IPsec (IP security protocol suite), and CAN authentication