Engineered substrates for filters is taking off – An interview with Soitec

Fueled by a desire to push performance limits, new materials are being explored by different companies for different semiconductor applications. In this context, engineered substrates are being developed for either lower cost, e.g. SiC and poly SiC bonding, or better performance, e.g. piezo-on-insulator, for filter applications. As indicated in Yole Développement’s latest report “Emerging Semiconductor Substrates: Market & Technology Trends 2019”, engineered substrates are expected to drive growth in the emerging substrate market in the next five years.

Source: Emerging Semiconductor Substrates report from Yole Développement, 2019

Soitec is the historical pioneer for engineered substrates with SOI technology. They are now applying their technology and know-how into new products. I-Micronews invites you to discover the point of view of Soitec with the interview of Christophe Didier, Manager, Filter Business Unit, Soitec.

This interview has been conducted by Hong Lin PhD. Senior Technology & Market Analyst and Ezgi Dogmus, PhD. Technology & Market Analyst at Yole Développement (Yole).

Ezgi Dogmus & Hong Lin (ED & HL): Could you please introduce yourself to our readers? What are your responsibilities at Soitec?

Christophe Didier (CD): I am Christophe Didier and I manage Soitec’s filter business unit. The main focus of our filter business unit is to deliver Piezo on Insulator (POI) substrates to enable our customers to design and manufacture acoustic wave filters for 4G and 5G RF front-end modules.

ED & HL: Soitec is developing many new kinds of engineered substrates for compound semiconductors. Could you please describe your activities? What are the main applications today?

CD: The introduction of advanced 4G and 5G sub-6GHz networks requires the introduction of new features and technologies by the operators and the phone makers: more bands, bands with larger bandwidth, higher frequency bands, many band combinations to support the different carrier aggregation modes and MIMO. Soitec POI substrates allow the manufacturing of higher performance, more integrated surface acoustic wave (SAW) filter components in response to the more stringent requirements demanded by the new 5G networks. Those filters are then integrated into smart phone front-end modules along with the power amplifiers, switches and antenna tuner devices that are already manufactured using Soitec RF-SOI substrates.

ED & HL: In your opinion, what are main drivers and challenges for engineered substrates for compound semiconductors?

CD: Today high-volume SAW filters for smart phones are built on bulk piezo materials such as Lithium Tantalate or Lithium Niobate. These materials suffer from high thermal coefficient expansion. This issue can be compensated for partially by adding a layer on top of the metal layers at the end of the device fabrication. Unfortunately, this layer affects the coupling efficiency and the final performance of the filter. By using the multiple layers present in Soitec POI substrates, we constrain the piezo layer, reducing the thermal expansion and therefore the temperature sensitivity. This also simplifies the manufacturing process since we do not need an additional layer on top of the metallayer to constrain the piezo material, thus improving the coupling efficiency.

Soitec – Soitec products include engineered substrates, most notably silicon-on-insulator (SOI) based on its proprietary Smart Cut technology, 2019

ED & HL: Soitec is introducing POI into the market. Could you tell us the product and the motivation behind this development?

CD: The Soitec POI products consist of a thin layer of piezo material (today Lithium Tantalate) on top of the SiO2 layer and a high resistivity silicon substrate. This structure gives the filter designers access to a material with a better coupling factor (k²) and with lower thermal expansion coefficient. It will enable them to design resonators with higher quality factor and higher frequencies, larger bandwidth filters, with very low temperature sensitivity. It provides also the capability to integrate multiple filters on the same die.

The POI product will allow front-end module makers to better respond to the strict 4G advanced/Sub 6GHz 5G requirements and improve bandwidth and coverage for the smart phone users.

ED & HL: How does Soitec see the engineered substrate market growing? For which applications?

CD: The front-end module is going through a profound evolution and it provides a strong opportunity for the introduction of these new filters built on Soitec POI substrates. More precisely, it will allow integrated components such as antenna multiplexers and filter multiplexers or higher performance filters to become mainstream. We expect a large adoption of POI substrates in the coming years.

ED & HL: According to you, what would be the next steps for engineered substrate development?

CD: We believe that the next step for our POI substrate could be the use of different piezo materials, a possible transition to larger wafer size or the adoption of the POI substrate to build different types of filters to further improve bandwidth, higher frequency band coverage while controlling system cost.

ED & HL: Is there anything else that you would like to share with our readers concerning engineered substrates and Soitec’s activities?

CD: Soitec has long history in high-volume manufacturing of engineered substrates. Today, Soitec facilities in France, Singapore and China have a total yearly production capacity of 1.3 million 200-mm wafers and 1.6 million 300-mm wafers. We have a dedicated fab in Bernin that is now preparing to ramp-up the volume of the POI substrate.


Christophe Didier from Soitec - Interviewed by and Yole Développement

Christophe Didier, Soitec’s Filter Business Unit Manager, has over 30 years’ experience in the semiconductor Industry. He first joined Soitec in 2010 as Marketing Manager. Prior to Soitec, he held several positions from field application engineer,    design center manager, program manager and product/customer marketing manager on ASIC and FPGA products at LSI Logic, Altera and eSilicon in Silicon Valley, California. He earned a degree in Electronic Engineering from ESIEE in Paris and an executive MBA from the Insituto de Empresa in Madrid, Spain.


Hong Lin, PhD., Senior Technology & Market Analyst, Yole Développement

Hong Lin, PhD. works at Yole Développement (Yole), as a Senior Technology and Market Analyst, Compound Semiconductors within the Power & Wireless division since 2013. She is specialized in compound semiconductors and provides technical and economic analysis. Before joining Yole Développement, she worked as R&D engineer at Newstep Technologies. She was in charge of the development of cold cathodes by PECVD for visible and UV lamp applications based on nanotechnologies. She holds a Ph.D in Physics and Chemistry of materials.

As a Technology & Market Analyst, Compound Semiconductors, Ezgi Dogmus, PhD. is member of the Power & Wireless division at Yole Développement (Yole). She is daily contributing to the development of these activities with a dedicated collection of market & technology reports as well as custom consulting projects.
Prior Yole, Ezgi was deeply involved in the development of GaN-based solutions at IEMN (Lille, France). Ezgi also participated in numerous international conferences and has authored or co-authored more than 12 papers.
Upon graduating from University of Augsburg (Germany) and Grenoble Institute of Technology (France), Ezgi received her PhD in Microelectronics at IEMN (France).

Related report:

Emerging semiconductor substrates are expected to grow at a 24% CAGR from 2018 – 2024.