Search

Co-packaged Optics: all eyes on high-performance computing

Product Related

AI bottlenecks drive the adoption of optical interconnects for next-generation HPC systems.

OUTLINE

  • The CPO market is expected to reach US$2.6 billion in 2033.
  • Data center operators will prefer proven low-cost and flexible solutions.
  • Broadcom remains the last CPO supplier.

Revenue generated by the CPO market reached around US$38 million in 2022 and is expected to reach US$2.6 billion in 2033, at a 46% CAGR for 2022-2033. According to Yole Intelligence, part of Yole Group, projections of rapidly growing training dataset sizes show that data will become the main bottleneck for scaling ML models, and as a result, a slowdown in AI progress might be observed. Using optical I/O in ML hardware can help to solve the issues related to explosive data growth. To accelerate data movement in AI/ML gear is the main driver for adopting optical interconnects for next-generation HPC systems.

Martin_VALLO-MVA_YINT
Martin Vallo, Ph.D., Senior Analyst, Photonics, specializing in optical communication and semiconductor lasers within the Photonics and Sensing division at Yole Intelligence
“Pluggable form factors will be limited in their ability to support 6.4T and 12.8T capacity in terms of required electrical and optical densities, thermal management, and energy efficiency. As a result of discrete electrical device implementation, power dissipation, and thermal management are becoming limiting factors for future pluggable optics. Co-packaging using a silicon photonics technology platform aims to overcome the challenges mentioned above”.

In this context, Yole Intelligence releases its Photonics & Lighting report, Co-packaged Optics for Datacenter 2023. In this report, the company – part of Yole Group – provides the context of why DC operators explore CPO technology, gives market forecasts split by technology architectures, and reviews the industry and the potential impact on the supply chain. It also examines technological approaches for CPO and discusses CPO challenges. In addition, this study reviews the global challenge and focuses on the POWER / ENERGY aspect.

Titre du visuel

june 2021

You have to be registered to download our medias.

Usage restriction: Images may not be used against the interests of Yole Développement (Yole Group) and its entities, Yole Intelligence, or System Plus Consulting (Yole SystemPlus). For more information, please contact the Public Relations team.

INFORMATIONS

Copyright : © Yole Développement, 2023

Licence : Images can be used online and for printing, without modification

Thematic(s) :

Optics are coming closer and closer to the chipset. Bringing in data using light to the point where it is centrally processed is one of the main goals of architecture designers. This trend started a decade ago with proprietary designs for optical assemblies mounted on PCBs . The idea of these EOIs has continued in the COBO , which has developed specifications to permit the use of board-mounted optical modules in the manufacturing of networking equipment. CPO is an innovative approach that brings the optics and the switch ASIC very close together. Since it is challenging with today’s technology to surround the 50T switch chip with 16 3.2Tbps optical modules, NPO tackles this by using a high-performance PCB substrate – an interposer – that sits on the host board, in contrast to CPO, where the modules surround the chip on a multi-chip module substrate. The NPO interposer is more spacious, making the signal routing between the chip and optical modules easier while still meeting signal integrity requirements. In contrast, CPO confines the modules and host ASIC much closer to each other with lower channel loss and power consumption.

Eric_MOUNIER-EMO_YINT
Eric Mounier, Ph.D., Fellow Analyst at Yole Intelligence
Networking hardware is seeing more common components as technology advances enable tighter integration of communication and computing technologies in commercial systems. Moreover, artificial intelligence models are growing in size at an unprecedented rate, and the capabilities of the traditional architectures – copper-based electrical interconnects – for chip-to-chip or board-to-board will become the main bottleneck for scaling machine learning”.

As a result, new very-short-reach optical interconnects have emerged for HPC and its new disaggregated architecture. Disaggregated design distinguishes the compute, memory, and storage components found on a server card and pools them separately. Using advanced in-package optical I/O technology to interconnect xPUs , specifically CPUs , DPUs , GPUs , FPGAs , and ASICs, with memory and storage can help to achieve the necessary transmission speeds and bandwidths.

Yole Intelligence’s Photonics and Lighting team invites you to follow the technologies, related devices, applications, and markets on www.yolegroup.com.

  • How Photonics will Contribute to Quantum Technologies and Applications – Eric Mounier
  • Global insights into the key photonics technologies enabling transceivers with terabit capacities – Martin Vallo
  • Co-packaged optics are inching closer to reality – Martin Vallo

Discover more here.

Stay tuned!

Acronyms

  • AI : Artificial Intelligence
  • HPC : High Performance Computing
  • CPO : Co-Packaged Optics
  • CAGR : Compound Annual Growth Rate
  • I/O : Input/Output
  • ML : Machine Learning
  • PCB : PCB: Printed Circuit Boards
  • EOI : Embedded Optical Interconnects
  • COBO : Consortium for On-Board Optics
  • ASIC : Application-Specific Integrated Circuit
  • NPO : Near Packaged Optics
  • xPU : Various Processing Units
  • CPU : Central Processing Units
  • DPU : Data Processing Units
  • GPU : Graphics Processing Units
  • FPGA : Field Programmable Gate Arrays

Would you want to receive our Press Releases ?

Sign in Sign up free

Do you have an account?

Sign in to your account to access your services

up