Technology, Process and Cost
Ambarella CV2 Computer Vision SoC
By Yole SystemPlus —
Ambarella vision processor using Samsung’s 10nm process targeting video surveillance, home security camera and machine vision applications.
Ambarella vision processor using Samsung’s 10nm process targeting video surveillance, home security camera and machine vision applications.
Ambarella is one of the leading developers of low-power and ultra high-definition video processing processors. Ambarella introduced the CV2 with full System on Chip (SoC) functionality using Samsung’s 10nm technology process. The CV2 SoC combines advanced computer vison, video encoding, image processing and stereo vision on a single chip.
This second generation computer vision product has improved performance with up to 20 times better processing performance compared to the first-generation CV1 processor. The CV2 processor consumes little power, and the computer vision architecture enables object recognition with high accuracy.
Significant die area is devoted to the stereo image processor, the Image Signal Processor (ISP), and the video codec. The quad core Arm processor with L2 cache occupies a relatively small area compared to other circuit blocks. The main functional areas take up approximately 66% of the active area of the die.
A full teardown has been conducted to provide insights into the Ambarella CV2 Computer Vision SoC, which is integrated in Hanwha Technwin’s Wisenet Network Camera. To reveal all the details of Ambarella’s SoC, this report features multiple analyses including a floor plan analysis to understand the high-level chip architecture with Intellectual Property (IP) block area contribution measurements. It identifies all the chip features and Samsung’s 10nm process. The report includes package and CV2 die cross section and the back-end construction analysis for packaging structure.
The complete process is built from 3D X-Ray images, optical, SEM cross-sections, material analysis and delayering. This report includes detailed manufacturing process and an estimation of the wafer, die and component cost.
Overview / Introduction
- Executive Summary
- Reverse Costing Methodology
Company Profile
- Ambarella Financial Results
- Ambarella Products & Technology
- Ambarella Computer Vision
Physical Analysis
- Summary of the Physical Analysis
- Wisenet Camera Module
- Camera View & Features
- Camera Module
- Module Views
- Module Teardown
- Module Board
- Ambarella SoC Package
- Package View and Marking
- Package X-Ray
- Package Cross Section
- Package Opening
- Processor Die
- Die View and Marking
- Die Delayering
- Die Process
- Die Cross Section
FloorPlan Analysis
Processor Manufacturing Process
- Global Overview
- Processor Die Front-End Process
- Processor Fabrication Unit
- Final Test & Packaging Fabrication Unit
- Summary of the Main Parts
Cost Analysis
- Summary of the Cost Analysis
- Yields Explanation & Hypotheses
- Processor Die
- Die Front-End Cost
- Die Probe Test, Thinning & Dicing
- Die Wafer Cost
- Die Cost
Selling Price
Feedback
Related Analyses
System Plus Consulting Services
Complete teardown with:
- Detailed photos
- Precise measurements
- Materials analysis
- Floor plan analysis
- 3D X-ray images
- Manufacturing process flow
- Supply chain evaluation
- Manufacturing cost analysis
