Apple M1 Max System-on-Chip

While x86 architecture is still expected to account for most PC processing, Apple’s switch to in-house processor silicon signals a major shift in this structure. Yole’s market analysis expects 14% of PCs to run on non-x86 processors by 2027, up from just 4% in 2020. Apple’s strategy with the M1 family and its derivatives is the main factor in this market shift, as Apple shows what is possible at the high-end of PC performance.

This full reverse costing study was conducted to provide insight on the technology data, manufacturing cost, and selling price of the Apple M1 Max System-on-Chip (SoC).

In 2020, Apple published the M1 SoC to run its macOS on a proprietary design. The birth of Apple’s first processor for personal computing created a shockwave in the industry. Apple became totally independent in processor development, leaving many to speculate whether the end of Apple sockets for Intel processors had arrived. The following year, Apple presented M1 Pro and Max SoC as the next generation of M1. Once again, Apple showed its ambition and capability with these two powerful SoCs. The M1 Pro’s die is twice the size of the M1’s die, and the M1 Max die is almost four times bigger.

According to Apple, the biggest and most powerful chip for Pro Notebook – M1 Max SoC – includes 57 billion transistors, which is 70% more than M1 Pro and 3.5 times more than M1. Regarding chip architecture, the M1 Max is equipped with a 10-core CPU, a 32-core GPU, a 16-core neural engine, and an Apple-designed media engine that boosts video processing while maximizing battery life. The chip is fabricated by TSMC on 5nm process, which is also used to manufacture Apple’s A14, A15 SoC, and the other M1 variants.

The Apple M1 Max SoC integrates four external LPDDR5 SDRAMs into a SiP (system-in-package). The SoC die is flip-chip mounted onto the M1 Max SoC PCB by ball grid array (BGA) and shares the same PCB with LPDDR5 SDRAM packages. The package also includes MLCCs (multilayer ceramic capacitors) and IPDs (integrated passive devices).

To reveal all the details of the Apple M1 Max SoC, this report features multiple analyses. These include a front-end construction analysis to reveal the most interesting features of the TSMC 5nm process, as well as package assembly and structure. In addition to a complete construction analysis using SEM cross-sections, material analyses, and delayering, we show high-resolution TEM cross-section images of TSMC’s 5nm features. A CT-scan (3D X-ray) is also provided to reveal the layout structure of the whole chip package. Moreover, the floorplan of the SoC die is included to give a clear view of IP blocks and general chip architecture. Lastly, this report contains a complete cost analysis and a selling price estimation of Apple’s M1 Max SoC.

   

Product’s key features:

• Detailed photos
• Precise measurements
• Front-end structural analysis with TEM
• Back-end structural analysis with CT scan
• Floorplan
• Materials analysis
• Manufacturing process flow
• Supply chain evaluation
• Manufacturing cost analysis

Available on our Yole Group All-Inclusive Semiconductor Packaging and Computing Package

Overview / Introduction

• Executive Summary
• Product Brief
• Reverse Costing Methodology
• Glossary

Company Profile

• Company Profile
• Apple M1 SoC Series
• Market Analysis

Physical Analysis

• MacBook Pro Teardown
• Apple M1 Max Package Analysis
  • Views & Dimensions
  • CT-Scan Image
  • Cross-Section
• DRAM Die
  • Package View
  • Die View
  • Cross-Section
• Apple M1 Max SoC Die
  • Views & Dimensions
  • Delayering
  • Die Process
  • Die Cross-Section
• FEOL (TEM Analysis)

Floor Plan

Manufacturing Process

• Global Overview
• SoC Die Front-End
• SoC Die Wafer Fabrication Unit
• SoC Die Packaging Process
• Final Assembly

Cost Analysis

• Cost Analysis Summary
• Yields Explanation & Hypotheses
• SoC Wafer Cost
• SoC Die Cost
• SoC Packaging Cost
• SoC Component Cost

Selling Price

Feedback

Related Analysis

System Plus Consulting Services