NVIDIA A100 Ampere GPU

The high end electronic packaging market was worth more than $880 million dollars in 2019. The biggest market for high end performance packaging comes from telecom and infrastructure. It has more than a 50% market share according to Yole Développement’s report High-End Performance Packaging: 3D/2.5D Integration 2020.

The NVIDIA Ampere A100 targets high performance data centers, artificial intelligence applications, data analytics, and High-Performance Computing (HPC). It uses advanced technologies, including TSMC’s 7nm FinFET chip, 3D stacked memory with 2.5D integration on a silicon interposer in a Chip-on-Wafer-on-Substrate (CoWoS) process.

The new generation GPU provides significantly higher performance compared to the previous generation. The HBM2 DRAM solution satisfies the market need for high performance, energy efficiency, and compact integration. A 3D assembly process yields HBM2 stacks composed of eight 1GB memory dies and one logic die, connected with via-middle through-silicon vias and micro-bumps.

More than 6,000mm² of silicon area is integrated in a single 55mm x 55mm 12-layer ball grid array (BGA) package of the NVIDIA Ampere A100. Two major semiconductor leaders, Samsung and TSMC, collaborate to deliver this much silicon in a single package. TSMC is the main provider for the NVIDIA Ampere A100. Using its 2.5D CoWoS platform, it manufactures the world’s largest processor built on 7nm process technology.

The report includes a complete physical analysis of the package, the GPU die, interposer die and the HBM2 DRAM. Along with the manufacturing process of the silicon dies, CoWoS process and final assembly, this report comes with a cost analysis and a price estimation of the NVIDIA Ampere A100. Finally, the report includes a comparison to highlight the similarities and differences between the NVIDIA Ampere A100 and NVIDIA’s Tesla P100 and V100.