Technology, Process and Cost
SK Hynix HBM3
SK hynix HBM3 in Nvidia GH200: full teardown, packaging analysis and manufacturing cost estimation
SPR25952Key features
- Detailed photos
- Precise measurements
- Die analysis
- Package analysis
- Materials analysis
- Manufacturing process flow
- Supply chain evaluation
- Manufacturing cost analysis
Product's objectives
The report includes a complete physical analysis of the HBM3, this analysis includes package cross sections on different zones. Several Optical and high-resolution SEM images reveal the DRAM & Logic dies integration in the HBM3 package. Provided is the front-end and back-end manufacturing process of the DRAM & Logic dies, HBM3 process and the HBM Stack assembly. An estimation of the manufacturing cost and detailed process steps of the HBM Stack are detailed in the report.
SK hynix HBM3 from Nvidia GH200
The year 2024 started with strong momentum, driven by a surge in demand from AI training workloads in data centers, as the industry recovered from the 2022–2023 cyclical downturn, which had resulted in a historic operating loss across the DRAM industry.
In 2024, DRAM revenue growth surged by 87% YoY, driven primarily by HBM's price premium over conventional DRAM and strong demand for high-performance DRAM in the datacenter sector. The HBM price premium is expected to persist in the coming years, providing sustained momentum for overall DRAM revenue expansion.
HBM is the ideal memory technology to meet the demanding performance requirements of generative AI applications. Advanced packaging approaches are needed for stacking multiple dies and integrating the resulting HBM stack in a computing system based on a GPU, CPU, or an AI ASIC accelerator.
SK hynix began mass production of HBM3 in 2022, continuing its leadership in high-performance memory solutions. The company supplied HBM3 to major computing and AI customers, including NVIDIA. This generation brought higher bandwidth and better power efficiency compared to HBM2E. For this version, SK hynix implemented 3D stacking with 8 dies per stack, reaching a total capacity of 16 GB per stack. The company’s expertise in TSV (Through-Silicon Via) and 3D packaging enabled reliable vertical integration while ensuring good thermal and electrical performance.
This full reverse costing study has been conducted to provide insight on technology data, manufacturing cost and selling price of the SK Hynix HBM3 from Nvidia GH200 . The report includes a complete physical analysis of the HBM3, this analysis includes package cross sections on different zones. Several Optical and high-resolution SEM images reveal the DRAM & Logic dies integration in the HBM3 package. Provided is the front-end and back-end manufacturing process of the DRAM & Logic dies, HBM3 process and the HBM Stack assembly. An estimation of the manufacturing cost and detailed process steps of the HBM Stack are detailed in the report.
Overview
- Executive Summary
- Reverse Costing Methodology
- Glossary
Company Profile
- SK hynix Financials
- HBM Market Shares
- Product Specification
Physical Analysis
- Summary of the physical analysis
- System Teardown
- Package Analysis (Overview, Opening, Cross Section)
- Die Analysis (DRAM die, Logic die)
Manufacturing Process Flow Analysis
- HBM-DRAM & LOGIC Front-end process
- HBM Process
- TSV Process
- Micro bumping Process
- HBM Stacking Process
- HBM Wafer Fab Unit
Cost Analysis
- Cost Summary
- Supply Chain
- Yields Explanation & Hypotheses
- HBM TSV Manufacturing Cost
- DRAM µbumping Cost
- DRAM Middle-End Cost
- DRAM Wafer & Die Cost
- Logic Middle-End Cost
- HBM Stacking Cost
- HBM Wafer Cost
- HBM Stack Cost
Selling Price
- Definitions of Price
- Estimated Selling Price
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