Tesla UBQ01B0 FSD Chip

Automotive SoC Market for ADAS functions is expected to reach $3.5B in 2025, driven by a huge growth with a CAGR20-25 of 22%, according to Yole Développement’s report Computing AI for Automotive. In addition to releasing a series of software updates for Autopilot, Tesla also releases hardware updates.

The latest big one was the update from HW2.5 to HW3.0. This update is claimed to provide all of the hardware (computing and otherwise) necessary for full self-driving, according to Elon Musk.

In HW2.5, Tesla’s Autopilot was enabled by Nvidia’s SoCs and GPU. The main change in HW3.0 is the integration of Tesla’s self-made SoC. Each autopilot hardware now includes two Tesla-designed SoCs, providing redundancy and 21x performance improvement at a 0.8x manufacturing cost. When released, Tesla’s FSD chip was the first automotive SoC to use 14nm FinFET process, and more importantly it was the first internally designed SoC for automated driving made by a car manufacturer. This chip development shows Tesla’s talent for vertical integration, realizing software development, chip design as a semiconductor fabless company, electronic system integration as a tier-1 company, and vehicle production.

To support FSD chip production, Tesla selected Samsung as its foundry. The chip embeds one ISP, two GPU, two neural network processors, one CPU with 12 ARM cores, and one lockstep CPU.

A full teardown was conducted by System Plus to provide insight on Tesla’s FSD SoC integrated in the company’s Driver Assist Autopilot 3.0. To reveal all the details of Tesla’s SoC, this report features multiple analyses. These include delayering to reveal main silicon blocks, as well as package and die cross-sections to identify front- and back-end processes.

This comprehensive report is built from optical, SEM cross-sections, material analysis, and delayering. Analyses of the supply chain and manufacturing process are also included, along with an estimated wafer, die, and component cost.

Overview / Introduction

• Executive Summary
• Reverse Costing Methodology
• Block Diagram

Physical Analysis

• Summary of the Physical Analysis
• Package Analysis
  • Package overviews, dimensions
  • Package cross-section
• Die
  • Die view and dimensions
  • Die delayering and main blocks ID
  • Die process
  • Die cross-section
  • Die process characteristic

Manufacturing Process

• Die Front-End Process & Fabrication Unit
• Back-End Process & Fabrication Unit
• Summary of Inputs

Cost Analysis

• Summary of the Cost Analysis
• Yields Explanation & Hypotheses
• Die
  • Die front-end cost
  • Die probe test and dicing
  • Wafer and die cost
• Packaged Component
  • Packaging cost
  • Back end: final test
  • Component cost

Estimated Selling Price

Reverse costing with:

• Detailed photos
• Precise measurements
• Materials analysis
• Manufacturing process flow
• Supply chain evaluation
• Manufacturing cost analysis