As highlighted in two of Yole Group’s recent reports, Computing and AI for Data Centers 2026 and Next-Gen DRAM 2026 – Focus on HBM and 3D DRAM, AI’s push toward gigawatt-scale infrastructure is exposing a growing gap between exponential compute demand and the economic, power, and manufacturing limits of advanced logic and memory.
Adrien Sanchez, Hugo Antoine, and John Lorenz are part of Yole Group’s Computing & Memory team, where they combine market modeling and industry insights to analyze the fast-evolving semiconductor landscape.
Building on Yole Group’s computing and memory analyses, they connect bold industry visions, such as Elon Musk’s Terafab, to real-world constraints. Their analysis highlights a key challenge: the widening gap between exponential growth in demand for AI compute and the limits of memory, manufacturing capacity, and investment. Through this lens, they bring a data-driven perspective to the future of computing and memory.
Enjoy reading today’s snapshot!
Terafab is a $5 Trillion problem… in an optimistic scenario
The recent announcement of Elon Musk’s Terafab has stirred a lot of discussion in the semiconductor industry, for one major reason: Elon is preparing to launch his own fab, bringing together logic wafer manufacturing, memory, and packaging. However, if his keynote had stopped there, it would already have been remarkably ambitious. But he went significantly further.
What surprised the industry is Elon’s claim: the current and future global wafer capacity is insufficient for his own ambitions; he needs 1 TW/year of AI compute production. So, let’s suspend our skepticism for a moment and take Yole Group’s analysts’ assumptions at face value, and go for it!
John Lorenz
Director, Computing & Memory activities at Yole Group
At Yole Group, we’re used to sizing markets, counting wafers and all kinds of exotic semiconductors. In fact, we’ve been doing this for 25 years by gathering feedback from across the industry.
If 1 TW per year of computing power were produced using a data center architecture like Nvidia’s Vera Rubin NVL72, the total cost to build a fab to manufacture 23 million logic wafers and 122 million DRAM wafers for HBM annually would be $5.4 trillion. This $5.4 trillion breaks down into $2.3 trillion for logic fabs and $3.1 trillion for HBM fabs. However, semiconductor CapEx pays for the capacity to produce AI computing power at different rates, depending on the architecture. If we consider Rubin Ultra Kyber NVL144, the CapEx would be even higher, at $10.4 trillion.
For more information about the semiconductor foundry industry, see the new Yole Group’s report, Status of the Semiconductor Foundry Industry 2026.
At these levels of investment, HBM actually represents the majority share. Without HBM, the CapEx becomes more realistic, which could favor HBM-free processors, as is already the case today with Tesla’s AI4 or AI5 chips.
Otherwise, we could think more creatively… Why not revive the 450mm wafer roadmap that was abandoned in 2017? More seriously, the 1 TW scale proposed by Elon Musk will likely take many years to materialize.
To put this into perspective, analysts estimate that global annual sub-10nm logic wafer capacity in 2025 was 8.5 million, compared to 22.2 million for DRAM.
Beyond this scenario, here is Yole Group’s outlook on data center processors for the next 5 years
Beyond these forward-looking scenarios, what is already clear today is that AI is fundamentally reshaping the data center processor market, and even the whole semiconductor industry. According to Yole Group’s Computing and AI for Data Centers 2026 report, the market is expected to grow from $215 billion in 2025 to $656 billion by 2031, driven primarily by generative AI workloads. GPUs from Nvidia and AMD remain the dominant segment, but AI ASICs are emerging as the fastest-growing segment, with a projected 35% CAGR, reflecting hyperscalers’ increasing focus on in-house silicon in collaboration with Broadcom, Marvell, MediaTek, or Alchip, among others.
Hugo Antoine
Technology & Market Analyst, Computing and Software at Yole Group
This acceleration is closely tied to hyperscaler investment dynamics. U.S. hyperscaler CapEx alone is expected to reach $685 billion in 2026, sustaining strong momentum across the entire AI semiconductor ecosystem.
However, this growth also introduces structural constraints. The supply of key components such as HBM, leading-edge logic wafers, and CoWoS is becoming increasingly critical. Power availability is also becoming an increasingly critical constraint, reinforcing interest in space-based solutions, the feasibility of which is analyzed in Yole Group’s report.
The CPU landscape is also evolving rapidly with the rise of Agentic AI. While Intel and AMD continue to dominate the server CPU market, the rise of Arm-based architectures, driven by hyperscalers such as AWS, Google, and Microsoft, and the recently announced ARM AGI CPU, is reshaping the balance.
Nvidia GTC 2026 once again sets the tone for the industry
These dynamics were clearly evident at Nvidia GTC 2026, which once again set the tone for the industry. The event highlighted the continued push toward larger, more integrated systems: rack-scale architectures, advanced chiplet designs, and increasing HBM capacity. GTC also confirmed a key industry trend: the disaggregation of compute, with the development of infrastructures combining Groq LPX and Nvidia Rubin.
Key takeaways
While visions such as Elon’s Terafab highlight the long-term ambition of the AI industry, they also underscore the growing gap between demand and manufacturing capability.
Adrien Sanchez
Senior Technology & Market Analyst, Computing at Yole Group
Bridging this gap will require not only massive investment but also fundamental semiconductor and architecture innovation.
And this is exactly where Yole Group’s analysis aims to provide clarity in Yole Group’s Computing and AI for Data Centers 2026.
Stay connected with Yole Group to navigate the rapidly evolving computing landscape!
As AI accelerates and challenges around memory, manufacturing, and power intensify, a comprehensive, data-driven understanding is more critical than ever. Yole Group’s analyses provide the insights needed to bridge ambition and reality, helping you anticipate trends and make informed decisions in an increasingly complex semiconductor ecosystem.
Stay tuned!
About the authors
Adrien Sanchez is Senior Technology & Market Analyst, Computing at Yole Group.
Adrien produces technology & market analyses covering computing hardware and software, AI, machine learning, and neural networks.
Adrien graduated with a double degree from Grenoble Institute of Technology PHELMA (Grenoble INP Phelma, France) and Grenoble École de Management (GEM, France). He also earned an MSc in AI at Heriot-Watt University (Edinburgh, UK).
Hugo Antoine is a Technology & Market Analyst, Computing and Software at Yole Group.
Hugo develops technology & market analyses covering computing hardware, software, and Artificial Intelligence (AI).
Hugo holds a master’s degree from Ecole des Mines de Saint-Etienne (France), with a focus on microelectronics and computing at the Center de Microélectronique de Provence (France). In addition, he pursued an AI specialization at École Polytechnique de Montréal (Canada). Furthermore, he completed a dual-degree program in innovation management at emlyon Business School, highlighting his expertise at the intersection of technology and business.
John Lorenz is Director, Memory & Computing at Yole Group.
John leads the growth of the team’s technical expertise and market intelligence, while managing key business relationships with industry leaders. John also drives the development of Yole Group’s market research and strategy consulting activities focused on memory and computing technologies and markets.
Having joined Yole Group’s computing team in 2019, John brings deep insight into leading-edge semiconductor manufacturing to the division, which has delivered over 100 marketing and technology analyses to industrial groups, start-ups, and research institutes.
He holds a Bachelor of Science in Mechanical Engineering from the University of Illinois Urbana-Champaign (USA), where he specialized in MEMS devices.