High-End performance packaging as part of advanced packaging

An article written by Stefan Chitoraga, Technology and Market Analyst specializing in Packaging and Assembly, Taguhi Yeghoyan PhD., Technology & Market Analyst, Semiconductor Manufacturing, both at Yole Intelligence, part of Yole Group, and Belinda Dube, Technology & Cost Analyst at Yole SystemPlus, also part of Yole Group, for Semiconductor Digest.

Design cost is growing increasingly significant as semiconductor front-end nodes become smaller. In this context, advanced packaging, with its 2.5D & 3D solutions, has become crucial and effective in reducing the impact of the costs associated with front-end manufacturing while also helping with enhancing system performance and providing lower latency, increased bandwidth, and power efficiency.

According to Yole Intelligence, part of Yole Group’s definition, we classify products as being high-end performance if they come in packages that enable the integration of dies with an I/O density better than 16 I/Os per mm² with a pitch less than 130µm. Ultra-high density (UHD) fan-out, embedded Si bridge, Si interposer, 3D stack memory such as 3D NAND, high-bandwidth memory (HBM), and 3D Stack DRAM are some of the packaging platforms which meet these criteria. Another platform worth considering is 3DSoC, which employs die-to-wafer (D2W) hybrid bonding. There are two possible options for embedded Si bridges: the first, known as EMIB, is proposed by Intel and is embedded in the IC substrate; the second, a silicon interposer embedded in a mold compound, is offered by TSMC (LSI) and SPIL (FOEB). There are two types of Si interposers: a traditional or nonactive one, typically offered by TSMC, Samsung, and UMC; and an active one, Intel’s Foveros. EMIB combined with Foveros gives birth to Co-EMIB, which is used for Intel’s Ponte Vecchio. Samsung, SK hynix, and Micron are the companies that supply 3D stacked DRAM and HBM memory. The only company offering 3D NAND using wafer-to-wafer (W2W) hybrid bonding technology now is YMTC. But more competitors ‒ like Kioxia and the three companies mentioned above ‒ are expected to enter this industry. CMOS image sensors produced by Sony (since 2015) and OmniVision (since 2022) using W2W hybrid bonding is a 3D stacked packaging platform, but not a high-end performance one because it doesn’t answer to the requirements in terms of I/O density and pitch, therefore representing a noncomplex final package compared to the ones mentioned above.

High-end performance packaging is a small market in terms of units compared to other packaging platforms, but it generates proportionately higher revenue thanks to high average selling prices due to its complexity. Revenue is forecasted to exceed $14.5B by 2027, up from $2.6B in 2022, with a CAGR_2022-2027 of 41%…

…Read the full article from page 16 to 19.

Source: https://magazine.semiconductordigest.com/