Apple wants to control its whole manufacturing & supply chain

Apple has unveiled its first ARM-based system-on-chip product. The in-house designed SoC chip uses a 5nm FinFET process technology, achieving the highest number of transistors on a single chip. This M1 SoC is strategically designed for Apple’s consumer products, powering Apple’s latest MacBook Air, Mac mini, and MacBook Pro. Apple opted to switch to their ARM chips to be able to tailor design their processors for their MacBook products. This will allow Apple to control the manufacturing and supply chain as much as possible for most of its products.

John Lorenz, Technology & Market Analyst at Yole Développement (Yole), comments: “Publicly, Apple is touting the decision was based on performance enhancements of the M1, though we are confident there are also significant cost savings for Apple as Intel’s CPU margin is no longer a part of the new MacBook and Mac mini bill of materials. Over the next 18 months, Apple has hinted at its plans to move its whole PC fleet over to in-house designed processors, discontinuing a lineage of Intel-sourced CPUs dating back to 2006. Yole estimates that Apple’s processor sourcing decision will take Arm-based notebook PCs up from around 10M units in 2019 to more than 30M in 2022.” (Read the full analysis).

“This giant leap by Apple has shaken not only the processor competitors but also the computer world as Apple rolled out the M1 chip, their first personal computer chip,” announced Belinda Dube, Technology & Cost Analyst, Memories, at System Plus Consulting. “This M1 SoC uses a 5nm transistor technology node. The chip has been hyped for its exceptional performance and efficiency, attributed to its complex architecture. Apple integrates a full system on its chip, incorporating several high-performance and high-efficiency CPU cores and GPU cores.

Three functional areas take up more than 50% of the active die area, explains System Plus Consulting’s analyst. The three major contributors to the die area are the eight-core GPU, the standard cell logic, and the high-performance computing complex. This die is complex, and a significant area is devoted to standard cell functions, intentionally made to optimize Apple’s hardware.

Apple’s M1 SoC and DRAM memory are placed on a common package substrate bringing the memory closer to the processor. This allows easy access of data; it is facilitated by a unified memory architecture resulting in high bandwidth and low latency. The M1 SoC uses two LPDDR4 DRAM memory packages from SK Hynix.

System Plus Consulting, the reverse engineering and costing company, has carried out an in-depth technology and cost analysis of Apple’s M1 System-on-Chip. In this report, Apple’s M1 SoC is torn down and analyzed to reveal the specific die architecture and its special features. The die floor plan gives critical detail on the M1 architecture and main blocks. The Front-End-of-line analysis provides significant insight into the high mobility channel process used by TSMC. The die cross-section also reveals the FinFET transistors and serves to confirm the 5nm transistor process node. Also included in this report is a detailed cost analysis.

About the authors

Belinda Dube serves as a Technology & Cost Analyst at System Plus Consulting, part of Yole Développement.
Belinda’s core expertise is memory technology, especially DRAM and 3D NAND flash memory. At the same time, she also investigates IC technologies as well as advanced packaging.
Belinda’s mission is to develop reverse engineering & costing reports. She also works on custom projects, where she works closely with the laboratory team to set up significant physical & chemical analyses of innovative memory chips. Based on the results, Belinda identifies and analyzes the overall manufacturing process and all technical choices made by the memory makers. The objectives of these analyses are to understand the structure of the device, identify all materials used, and point out the link between functionality and technology selected by the memory company.
In addition, a significant portion of her mission is dedicated to a strategic technology watch, where her aim is to identify innovative memory chips and manufacturing processes. Based on her expertise, Belinda updates internal simulation tools and runs custom training sessions and demos with industrials.
Belinda attends many international trade shows & conferences where she collects valuable information and meets leading memory players. She regularly has an opportunity to reveal pertinent results during key onsite presentations and webcasts.
Prior to System Plus Consulting, Belinda had the opportunity to work on several R&D projects dedicated to MEMS technologies and new substrates at INSA (Lyon, France).
With a core Micro & Nano Electronics expertise, Belinda graduated from INSA (Lyon, France) with a master’s degree in Instrumentation & Nanotechnology Engineering.

John Lorenz is a Technology and Market Analyst within the Computing & Software division at Yole Développement (Yole), part of Yole Group of Companies. John is engaged in the development of market and technology monitors for the logic segment of advanced semiconductors, with an initial
focus on processors. Prior to joining Yole, John held various technical and strategic roles at Micron Technology. On the engineering side, his roles included thin film process development and manufacturing integration on DRAM, NAND, and emerging memory technologies and industrial engineering / factory physics for the R&D fab.On the strategic side, John ran the memory industry supply & capex model for corporate strategy / market intelligence, and established the industry front-end costing model within strategic finance. John has a Bachelor of Science degree in Mechanical Engineering from the University of Illinois UrbanaChampaign (USA), with a focus on MEMSdevices.

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