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The SEMI 3D & Systems Summit this year is dedicated to Smarter Systems through Heterogeneous Integration. The semiconductor industry has had several changes in market, products, and tech advancements brought by disruptive technologies and Moore’s Law plateauing. Therefore, continued developments and innovation are essential to growing the business.

Industry experts will share their insights into 3D and Heterogeneous Integration Roadmap (HIR) processes for semiconductor manufacturing and applications.

Yole group will be part of these Industry Experts with:

Semiconductor, Memory and Computing Division Director

Yole Intelligence

Monday, June 26
Session 1: Market Briefing and Technical Roadmaps
3:50pm – 4:10pm: Chiplet Design and 2.5D Integration: Evolution or Revolution

Chiplet design has found its way in the semiconductor industry, over the last years; and one of the enablers are the advanced packaging technologies based on stacking. Its emergence comes at the time when Moore ‘s law is slowing down and all the technical pillars and tools have been developed to enable chiplet as a choice in chip design. The industry has taken up the challenge to set up a whole supply chain from EDA tools to die bonding process.

The industry has geared up to chiplet adoption for years and has step by step removed the technical obstacles. Several commercial products based on chips partition and packaged using 2.5D solutions can now be found in the field, with this in mind, Yole has combined his strength in Processor and Advanced packaging to establish a model helping to define the sweet spot of chiplet versus monolithic SoC. Is partitioning the future of every chip?

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