M1: Apple did it

It is now done. Apple did it. Last November, the leading smartphones manufacturer, Apple has released its first ARM-based SoC. M1 has been designed by Apple, as a CPU for its line of Macintosh product and Apple claims that the M1 SoC is the world’s fastest CPU with the best CPU performance per watt.

“Two new Apple MacBook models and the Mac mini are now powered by an Apple in-house SoC design,” announces Belinda Dube, Technology & Cost Analyst, Memories at Yole SystemPlus, part Yole Group. And she adds: “The transition from Intel x86 processors has created shockwaves felt throughout the processor and computing world. This new, first SoC for Mac features 4-CPU high-performance cores, 4-CPU high-efficiency cores, and 8-GPU cores.”

The tight software-hardware integration inside Apple enabled a compact, efficient processor for personal computer that outcompetes many premium microprocessors. 16 billion transistors using TSMC 5nm process were used to build it. The chip architecture provides optimized power efficiency.

John Lorenz, Technology & Market Analyst, Processors at Yole Intelligence, part of Yole Group comments: “By switching to the M1 processor, Apple gives a boost to the prospects of ARM-based PCs, previously the domain of low-performing Chromebooks. Not only is this a well-spec’d solution for Apple, this is likely saving some cost on the MacBook’s components. Other notebook OEMs are sure to take note and may further examine their x86-based solutions, although Apple can do more coordination between hardware and software as they control their operating system. Most Windows-based OEMs would not have that luxury.”

Yole SystemPlus, part of Yole Group, the reverse engineering and costing company is pleased to announce a dedicated analysis focused on the latest Apple’s innovation. This report is titled: Apple M1 System-on-Chip.

To reveal all the details of Apple M1, Yole SystemPlus’ report features multiple analyses: a floor plan analysis to understand the high-level chip architecture with IP block area contribution measurements, a front-end construction analysis that reveals the most interesting features of the new TSMC 5nm process, a back-end construction analysis of the packaging structure, and a detailed manufacturing cost analysis.
“On the SoC side, it appears that the die area of the M1 was optimized for functionality rather than SRAM cache,” comments Belinda Dube from System Plus Consulting.
According to the Apple M1 report, there is limited on-chip cache, taking cues from mobile SoC designs relying on the UMA concept and external LPDDR4X DRAM. Significant die area is devoted to standard cell functions, indicating that Apple is leveraging in-house chip design to optimize hardware for the operating system.
On the packaging side, the same structure is used for Apple’s A12X and A12Z, with the integration of the DRAM on the SoC substrate, and embedded silicon capacitors in the substrate.