Technology, Process and Cost

Apple’s A15 Bionic System-on-Chip

By Yole SystemPlus — Nov 2021

Analysis of Apple’s A15 SoC in the iPhone 13 Pro MAX and iPhone 13 – the fastest graphical performance on a smartphone chip.

Apple’s A15 Bionic arrives as a performance leader in a smartphone processor industry expected to generate $35b in revenue for chip designers. Yole Développement’s market analysis expects the smartphone processor market to reach $40b by 2026.

This full reverse costing study was conducted to provide insight on the technology data, manufacturing cost, and selling price of the Apple A15 Bionic System-on-Chip (SoC).

Apple’s updated A series processor, the A15 Bionic SoC, is the world’s fastest smartphone chip. The A15 Bionic is a 64-bit ARM-based SoC with 6-CPU in a big.LITTLE configuration, 5-GPU plus a 16-core Neural Engine. According to Apple’s statement, the A15 delivers 50% faster graphics performance than any smartphone chip ever made. The chip has 15.8 billion transistors and was fabricated by TSMC on 5nm process, which also applies to the Apple M1 and Apple A14 Bionic. This game-changing chip now powers the iPhone 13 series and iPad mini 6^th.

The A15 SoC side contains SRAM cache in the die and integrates external LPDDR4X DRAM with packaging. To integrate the DRAM die, Apple performed standard PoP technology which includes copper pillar, redistribution layers and silicon high-density capacitor integration.

In order to reveal all the details of the A15 Bionic, this report features multiple analyses. This includes front-end construction analysis to reveal the most interesting features of the TSMC 5nm process, and back-end construction analysis for the packaging structure. Also provided is a detailed study of the SoC die analyses and its cross-sections. Moreover, in addition to a complete construction analysis using SEM cross-sections, material analyses, and delayering, we furnish a high-resolution TEM cross-section of a TSMC 5nm from the Apple M1. CT-scan (3D X-ray) is also provided to reveal the layout structure of the package. Lastly, this report contains a complete cost analysis and a selling price estimation of the component without the main PCB substrate.