Technology, Process and Cost
Everspin Technologies Latest STT-MRAM in 28nm
By Yole SystemPlus —
Technical and cost analysis of Everspin Technologies’ latest STT-MRAM in 28nm (EMxxLX). This report includes a detailed analysis of the magnetic stack, thanks to TEM and EELS mapping
SPR23724
Overview
- Executive Summary
- Product Specification
- Reverse Costing Methodology
- Glossary
Company Profile
- Financials
- Key History
- Everspin’s standalone MRAM Generation Evolution
- MRAM Market Potential – 2021-2027 Projections
Physical Analysis
- Summary of the physical analysis
- Package Assembly (Views, Dimensions, Opening, Cross-Section)
- Memory Die (Overview, Dimensions, Cross-Section, Delayering, Cell size, Process)
Magnetic Stack Physical Analysis
- FIB-cut Overview
- TEM – MTJ Interconnects
- TEM – Magnetic Stack
- EELS Elemental Mapping Overview
- Post MTJ Etch Treatment
- MTJ Layers
Manufacturing Process Flow Analysis
- Front-End Process Flow
- Wafer Fabrication Unit
- MRAM Manufacturing Process Flow
Cost Analysis
- Cost Summary
- Yields Explanation & Hypotheses
- MRAM Memory Front-End Wafer Cost
- MRAM Back-End-Of the Line Wafer Cost
- MRAM Wafer & Die Cost
- Packaging Cost
- MRAM Component Cost
Selling Price
- Definitions of Price
- Estimated Selling Price
Feedbacks
Related Products
About Yole Group
- Everspin Technologies
- GlobalFoundries
Key Features
- Detailed photos (optical, top-down SEM, cross-section SEM)
- TEM, EELS mapping
- Precise measurements
- Materials analysis
- Manufacturing process flow
- Supply chain evaluation
- Manufacturing cost analysis
What's new
- Among the different emerging non-volatile memory technologies, STT-MRAM seems to be the most promising for competing with traditional flash.
- In November 2022, Everspin Technologies’ latest Expanded Serial Peripheral Interface (xSPI) – the EMxxLX family of chips – became commercially available at memory sizes of 8, 16, 32, and 64Mb. These devices are based on GlobalFoundries’ 28nm CMOS wafers and Everspin’s STT-MRAM technology.
Among the different emerging non-volatile memory technologies, STT-MRAM seems to be the most promising with its potential for fast read/write, low power consumption, and high endurance compared to traditional flash. If the price of STT-MRAM remains relatively high, STT-MRAM cells operates with one transistor (1T1R) – which makes them scalable. This could be particularly interesting for replacing NOR flash, which isn’t scalable for technology nodes below 28nm.
In November 2022, Everspin Technologies’ latest Expanded Serial Peripheral Interface (xSPI) – the EMxxLX family of chips – became commercially available at memory sizes of 8, 16, 32, and 64Mb. These devices are based on GlobalFoundries’ 28nm CMOS wafers and Everspin’s STT-MRAM technology. This MRAM memory operates with a clock frequency of 200MHz, at a power supply of 1.8V, and delivers up to 400MBps for read-and-write.
This full reverse costing study was conducted to provide insight into the technology and manufacturing cost of Everspin’s xSPI STT-MRAM process technology. We provide a teardown analysis of the package and die, accompanied by optical and high-resolution SEM pictures. Moreover, a memory die cross-section reveals the magnetic stack used by Everspin. This report also includes TEM and EELS cartography of the MRAM bits, showing the complexity of the STT-MRAM magnetic stack.
The manufacturing of Everspin’s STT-MRAM adds only three mask layers to the standard BEOL process. The same process integration could be used for both stand-alone and embedded applications. To this end, our report furnishes a comprehensive analysis of the MRAM BEOL process integration.
