ADVANCED PACKAGING SUMMIT

This Summit is a conference dedicated to exploring the latest advancements in packaging technology for high-performance computing (HPC) and interconnection.
It brings together leading experts, researchers, and industry professionals to share their insights and experiences on advanced packaging solutions that enable high-density, high-bandwidth, and low-latency interconnects for HPC systems.
Topics covered at the summit include 3D packaging, hybrid bonding, LAB(Laser Assisted Bonding), heterogeneous integration, supply chain management, and more.

ABSTRACT

As front-end node becomes smaller, design cost is becoming more and more important. High-end performance packaging with its 2.5D & 3D solutions has become critical and effective in helping to reduce the impact of the cost related to front-end manufacturing while at the same time it helps to enhance system performance and present lower latency, increased bandwidth, and power efficiency. On top of that this is the back-end solution required for sustaining chiplet and heterogeneous integration.

Considering Yole’s definition, High-end Performance Packaging platforms are UHD fan-out, mold Interposer, embedded Si bridges, Si interposers, 3D stack memory, and 3DSoC.

High-end performance Packaging market is expected to be the fastest growing advanced packaging platform projected to reach over $16B by 2028 up from $2.21B in 2022, with a CAGR_2022-2028 of 40%. That will represent more than 20% of Advanced Packaging revenue in 5 years.

Electronic components with dies being integrated in high-end packages will experience an increased implementation in end-system units of high-performance computing, cloud computing, networking, artificial intelligence, autonomous driving, personal computing, and gaming.

Foundries and IDMs are leaders for 2.5D & 3D packaging solutions as those players benefit from front-end capacities and big resources. But OSATs are following this trend as well, offering innovative solutions or being part of the supply chain for final packaging and test.

Hybrid bonding with wafer to wafer and die to wafer approaches is the hot topic related to technology breakthrough as it allows to achieve 10μm fine pitch and less. This enables denser 3D IC stacking of logic or memory dies, the interconnection of partitioned SoC dies and heterogeneously integrated packages.

What is Yole’s definition for advanced packaging and for high-end performance packaging? How is the market forecast expected to evolve? What is the most suitable technology for the coming years? What are the driving markets, and which will be the killer application? Which players will lead the battle? From technology to market, an overview of innovations, applications, players & markets will be shared and debated to shed light on these questions and on 2.5D and 3D packaging impact on industry.