IEEE ELECTRONICS SYSTEM-INTEGRATION TECHNOLOGY CONFERENCE – ESTC 2024

The 10th IEEE Electronics System-Integration Technology Conference (IEEE ESTC 2024), is a highly anticipated conference, organized every two years in Europe. This event promises to be an exceptional gathering for professionals, researchers, and industry leaders to exchange knowledge, present their latest innovations, and discuss the future of electronics packaging and system integration. This conference will feature cutting-edge research presentations, keynote speeches from renowned experts, and interactive sessions designed to foster collaboration and drive advancements in the field.

Join us in Berlin for IEEE ESTC 2024, as we showcase our latest developments, and exploring the dynamic landscape of electronics system integration. This event provides an opportunity to stay at the forefront of technological progress, network with key players, and gain valuable insights into emerging trends and challenges. We are eager to contribute to this conference and look forward to seeing you there.

ABSTRACT:
Advanced packaging is becoming crucial for semiconductor innovation, adding functionality, and improving performance while lowering cost. Fan-out (FO) packaging is a versatile technology providing low pitch, high I/O density packages with lower thermal resistance, better signal integrity and smaller footprint than other mainstream packages. Fan-out is a cost-efficient solution for 2.5D and 3D multi-chip integrations, and it is gaining popularity in HPC, AI, and networking segments. The fan-out packaging market was estimated at $2B in 2023 and is expected to reach $3B in 2029, growing with a 6.9% CAGR (2023-2029). Currently, Core FO takes about 15% of this market, while high-density (HD) FO takes 58% and ultra-high-density (UHD) FO takes about 27%. UHD FO will experience the fastest growth between all types of fan-out packages, mainly driven by AI/HPC, networking and high-end PC applications. In fact, it is expected to replace Si Interposers in the future through innovative RDL Interposer and Fan-out embedded bridge technologies (also referred to as Mold Interposers), representing a viable and cost-efficient solution for chiplets and heterogeneous integration. HD FO is the dominating FO market class in terms of revenues, currently targeting the mobile and consumer market, mainly for smartphone and wearables’ applications processor units (APU). In the future, HD FO is expected to be used in more APUs inside high-end smartphones, wearables and other systems like AR and VR headsets. Moving forward, it has potential to package other devices such as memories, pluggable optical transceivers, and photonic integrated circuit (PIC) systems. Regarding the FO supply chain, TSMC is the biggest player, taking 77% of the
market in 2023 and it is expected to keep its market leadership. OSATs like ASE/SPIL, Amkor and JCET also take a significant portion of the market, producing high-volume Core FO packages while focusing their efforts in developing HD and 2.5D UHD FO solutions. Samsung is the leading IDM within the FO packaging market, focusing so far on HD FO solutions, and strongly pushing for UHD FO technology development. How is the FO market expected to evolve? What are the driving markets and the new applications? Will more players go into panel technology? Which players are leading the battle and who are the new entrants? An overview of the market and technology trends will be shared to shed light on these questions.