5G RF issues send Soitec seeking new wafer material

February 28, 2020

An article written by Junko Yoshida for EETIMES – Despite the Mobile World Congress cancellation, the pursuit of 5G grows fiercer by the hour, especially among electronics players who are hitting silicon performance limits for 5G RF front-end modules.

Among the candidate materials to supplant silicon are compound materials such as gallium nitride (GaN), gallium arsenide (GaAs), and silicon carbide (SiC), along with piezoelectrics, which are being used to improve filters. GaAs has been used for power amplifiers in 4G and 5G handsets. GaN has begun gaining traction for power amplifiers in 5G mmWave markets.

More and more RF fabless chip companies are seeking “new materials to solve their problems,” Paul Boudre, CEO of Soitec, told EE Times this weekin an interview here.

Together with CEA-Leti, Soitec (Grenoble, France) pioneered silicon-on-insulator (SOI) substrates. Already very successful with RF SOI wafers (used by RF chip companies to make switches and antenna tuners for smartphones), Soitec is poised to expand by branching into the new world of compound materials.

Boudre described a Sotiec plan “to develop, generate and offer new materials based on our engineered substrates” for fabless chip companies. A list of Soitec’s new material adventures includes:

piezoelectric-on-insulator (POI) engineered substrates — used to produce high-performance surface acoustic wave (SAW) filter components for 4G and the 5G New Radio (NR) bands
GaN-on-Si, GaN-on-SiC epiwafers. Soitec last year acquired Imect’s spinoff EpiGaN in Belgium, which developed the epiwafers. By integrating EpiGaN into Soitec and bankrolling the necessary tools, Soitec plans to enter the high-volume manufacturing base for the 5G GaN power amplifier market.
Soitec will this year start sampling SiC wafers based on the company’s proprietary technology called Smart Cut.

Soitec’s Smart Cut process allows Soitec engineers to define materials, grow single-crystalline layers of those materials, and then transfer those layers from one substrate to another. This makes it possible to create active layers of a wafer that can be managed independently from the supporting mechanical substrates.

Soitec’s goal, applying Smart Cut to SiC, is to significantly improve SiC at the substrate and device levels both in cost and quality.

The bulk of Soitec’s products are based on FD-SOI and RF-SOI substrates, both of which leverage Smart Cut technology. Soitec, similarly by using Smart Cut, has also recently put POI into volume production. Next up are Smart Cut-based SiC wafers, scheduled for sampling later this year.

Why SiC?

But why SiC now? Even with a boom in demand, SiC faces two big challenges. First, there aren’t enough SiC wafers to go around. Second, when it comes to yield rate, SiC sucks.

Soitec has engineered new Smart Cut SiC wafers with these problems in mind, first by substantially improving the quality of the SiC layer on the substrate, and second by transitioning from current 6-inch SiC wafers to 8-inch wafers in order to reduce the cost. Soitec currently has a SiC-wafer pilot line in Grenoble… Full story