Presentations Advanced Packaging & System Integration Technology 2018

 

 

Download below the presentations made available by the speakers.

Wednesday 20th of June – Short courses 

8:00 AM – 8:50 AM: Registration

8:40 AM – 9:00 AM: Welcome and Introduction
NCAP

9:00 AM – 12:00 PM: Short Courses Session

9:00 – 9:30 – Electronic Packaging Technology and Materials –  Here
CP Wong, Regents’ Professor and the Charles Smithgall Institute Endowed Chair at the School of Materials Science and Engineering, Georgia Institute of Technology

9:30 – 10:30 – HPC and Advanced Packaging Technology Development –  Here
Yifan Guo, VP of Engineering, ASE Group

10:30 AM – 11:00 AM: Coffee Break and Networking

11:00 – 12:00 – Accurate Package Characterization and Modeling for RFIC Design –  Here
Fujiang Lin, Professor, University of Science & Technology of China

 

12:00 PM – 1:30 PM: Lunch and Networking

 

Wednesday 20th of June – Symposium


1:00 PM – 1:30 PM: Symposium registration

1:30 PM – 1:45 PM: Welcome and Introduction
Yole Développement & NCAP

1:45 PM – 2:30 PM: KEYNOTE

1:45 – 2:30 – KEYNOTE: Impact of the Industry Trends on Advanced Packaging –  Here
Jean-Christophe Eloy, President & CEO, Yole Développement

2:30 PM – 3:20 PM: Session #1 – Advanced Power Packaging

2:30 – 2:55 – MOSFET Embedding in PCB –  Here
Sky Ran, Key Account Manager, Schweizer Electronic (Suzhou)

2:55 – 3:20 – MultiPlate: a New Tool for Next Generation Power Semiconductors –  Here
Bobby Chen, Business Manager of Semiconductor & New Field, Atotech Taiwan and China

3:20 PM – 3:45 PM: Coffee Break and Networking

3:45 PM – 5:25 PM: Session #2 – Panel Level Packaging

3:45 – 4:10 – Is Industry Ready for Fan-Out Panel Level Packaging (FOPLP)? –  Here
Santosh Kumar, Director Packaging, Assembly & Substrates, Yole Développement

4:10 – 4:35 – From Round to Square, cost effective sputter solutions for High Volume Manufacturing (HVM) –  Here
Andreas Erhart, Senior Manager, Product Marketing Advanced Packaging, Evatec

4:35 – 5:00 – Electroplating in Advanced Packaging: Effortless Scaling from Wafer to Panels with High Speed and Excellent Uniformity –  Here
Herbert Oetzlinger, CEO, Semsysco

5:00 – 5:25 – The Convergent Future: Industries-wide Disruption through Flexible Hybrid Electronics –  Here
Chong Chan Pin, Senior Vice President, EA/APMR and Wedge Bonders Business Lines, Kulicke & Soffa

5:25 PM – 6:15 PM: Panel Session
What are the real impacts of megatrends on equipment and materials ?

6:15 PM – 6:20 PM: Thank You and Adjourn
Yole Développement and NCAP

7:00 PM – 8:30 PM: Networking Cocktail


Thursday 21st of June – Symposium

8:00 AM – 8:15 AM: Welcome and Introduction
Yole Développement and NCAP

8:15 AM – 9:00 AM: KEYNOTE

8:15 – 9:00 – KEYNOTE: The Industrialization Road of Innovative Wafer-level Fan-Out Technology: eSiFO –  Here
Dr. Daquan Yu, Vice President, Huatian Technology (Kunshan) Electronic

9:00 AM – 11:20 AM: Session #3 – Fan-Out Wafer Level Packaging

9:00 – 9:25 – Fan-out Wafer Processing in the High Density Packaging Era –  Here
David Butler, EVP General Manager, SPTS Technologies

9:25 – 9:50 – 10 years of Thermal Debonding and Warpage Adjust –  Here
Klemens Reitinger, CEO, ERS electronic

9:50 – 10:15 – Defect Inspection for Shrinking RDL Line/Space in High-Density Fan-Out Wafer Level Packaging –  Here
Stephen Hiebert, Senior Director of Marketing, KLA-Tencor

10:15 AM – 10:45 AM: Coffee Break and Networking

10:45 – 11:10 – The Status of FOWLP Development in NCAP, China –  Here
Daping Yao, Ph.D., Technical Director, NCAP China

11:10 – 11:20 – The Investment environment and Semiconductor Packaging and Testing Industry of Xuzhou Economic and Technological Development Zone –  Here
Dai Lei, Member of the CPC Work Committee and Deputy Director of the Management Committee, Xuzhou Economic and Technological Development Zone

11:20 AM – 12:35 PM: Session #4 – High End

11:20 – 11:45 – Advanced Die Attach Technologies –  Here
Andreas Schopper, Vice President Flip Chip, Besi Switzerland

11:45 – 12:10 – Equipment and Process Challenges for the Advanced Packaging Landscape –  Here
Laura Mauer, Chief Technical Officer, Veeco

12:10 – 12:35 – High End Performance Application key Driver for Advanced Packaging –  Here
Thibault Buisson, General Manager, Yole Développement

 

12:35 PM – 1:45 PM: Lunch and Networking

 

1:45 PM – 3:25 PM: Session #5 – Equipment for Wafer Level Packaging

1:45 – 2:10 – Plasma for Wafer-On-Frame Treatment –  Here
Jack Zhao, Ph.D., Chief Scientist/Applications Director, Nordson March

2:10 – 2:35 – The Advancement of Carrier-Assisted Substrate Handling Technology for Advanced Packaging –  Here
Dongshun Bai, Ph.D., Deputy Business Development Director, Brewer Science

2:35 – 3:00 – Advanced Wafer Bonding Technologies Enabling Smart Connected Devices –  Here
Martin Eibelhuber, Deputy Head of Business Development, EV Group

3:00 – 3:25 – Laser Based Direct Exposure Tool Status in Advanced Semiconductor Packaging –  Here
Olivier Vatel, Chief Technology Officer, SCREEN

3:25 PM – 4:10 PM: Coffee Break and Networking

4:10 PM – 5:00 PM: Session #6 – Advanced Packaging Materials

4:10 – 4:35 – Introduction of Dipsol TS -3500(SnAg) Chemical for Bump Application –  Here
Atsushi Sakamoto, Manager, Dipsol Chemical

4:35 – 5:00 – TBA
Minghua Luo, General Manager, Dongguang Darbond YizTech Material

5:00 PM – 5:15 PM: Thank You and Adjourn
Yole Développement and NCAP

Download PDF files: AGENDA – SPEAKERS BIO – ABSTRACTS

PHOTOS OF THE EVENT: HERE.

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