Wolfspeed’s GaN-on-SiC tackles broadband design challenges

Wireless applications are the largest and fastest-growing segment in the electronics industry. From radar to satellite communications, two-way radios to cellular infrastructure, the sub-6-GHz broadband is where most of those applications reside, including certain implementations of 5G networks. 

Designing amplifiers for these applications is, however, a considerable challenge. Unlike typical amplifiers that must offer high-performance operation in a narrowly defined set of conditions, broadband amplifiers are required to operate over one octave or more. Many of the performance parameters vary with frequency, and  ensuring that the entire amplifier lineup delivers the required performance consistently across the entire band is a challenge. 

Fortunately, wide-bandgap semiconductor devices like gallium nitride help address this challenge and support continued growth in this market. For instance, Yole Développement estimates that the GaN RF market will reach $2 billion by 2025, growing at a CAGR of 12%. 

And in that market, GaN-on-silicon-carbide offers the best performance with clear advantages over silicon devices, including LDMOS, as well as devices fabricated with GaN on a Si substrate. 

Wolfspeed, a Cree company, uses GaN-on-SiC to provide its customers higher efficiency, wider bandwidth, higher power, and smaller size in order to cost-effectively meet requirements from multiple markets, such as military and aerospace, communications, and industrial applications. The company also supports its customers by designing reference boards for these products. 

The issues with broadband amplifier design are better-understood by following Wolfspeed’s approach to solving the amplifier requirement for the 500-MHz to 3-GHz telecom band. 

Meeting requirements, setting specs

A recent customer requirement was for the driver stage in a three-stage lineup to deliver a 125-W continuous-wave solution to cover the entire band. Wolfspeed already had a solution using two 70-W CG2H30070 devices for the output stages, and it was already known that 43 dBm, or 20 W, of RF power was needed to feed into that stage to get the required 125 W. 

It is recommended to set up the specs for the stages looking back from the final output, and this, therefore, became the target output power specification for the middle stage that is the focus of this study. 

Wolfspeed has a wide portfolio of GaN high-electron–mobility transistors, including 25-W devices. But with the necessary compromises for broadband operation, the 35-W CG2H40035F was selected after evaluating load-pull data 

From the load-pull data, too, it was apparent that 2 W of input power would be required, which became the spec for the pre-driver stage. That requirement is met by another Wolfspeed device, the CMPA0530002S. 

The main consideration for the driver stage was to get enough power out of the device while operating it efficiently enough for reliable operation, and this set the limits for tradeoffs. 

CG2H40035F is rated for a maximum junction temperature (Tj) of 225?C, a maximum case operating temperature (Tc) of 85?C, and junction-to-case thermal resistance (R?jc) of 3.4?C/W. 

pre-driver, driver and power amplifier stages

Therefore, the power dissipated must be: 

PDISS £ (225?C – 85?C) / 3.4?C/W = 41.2 W 

The minimum efficiency is then derived from the maximum DC power, PDC, that will keep Tj < 225?C. 



PDC = 41.2 + 20 – 2 = 59.2 W 

The minimum efficiency is then: 

EFF > PRF_OUT / PDC = 20 W / 59.2 W = 33.8% 

Therefore, in load-pull analysis, the region of success is where the device simultaneously has >10-dB gain with >43-dBm PRF_OUT and >34% drain efficiency, plus some margin for various losses, including mismatch loss. 

The broadband challenge

It would be wishful thinking to assume that efficiency, power, and gain all reach their peak values at the same load impedance and that their contours on the Smith chart would line up on top of each other. In reality, efficiency comes at the expense of output power capability (Figure 2). 

separation of output and drain efficiency contours 

Consider the target specifications defining a locus for each frequency wherein all the specs are met for a region of impedances, as shown in. This locus of compliance moves as well as changes size and shape with frequency. Whereas the lower frequencies tend to have wider regions on the Smith chart where specs are met, the higher frequencies have tighter regions of compliance due to device and package parasitics. 

Another problem is that these regions of compliance do not move in the same way as the load impedance, as the microstrip lines (MLINs) and shunt capacitances used for impedance matching rotate differently with frequency. The load impedance (blue arrow) tends to move clockwise with frequency, while target impedances (green arrow) tend to move counterclockwise as well as disperse. 

This, then, is the major challenge with broadband design. 

GaN-on-SiC addresses challenges

Several factors can be used to better align the contours and their movements for design success. The strategy should be to make the target and circuit impedances flatter and to make the contour loci bigger, offering a generous-enough area when the design is in spec. This in-spec area is dependent both on design techniques and device technology, as discussed below: 

  1. Circuit ZL curve is flatter with more matching sections. 

The blue curve for the circuit impedances, shown earlier in, is flatter when more matching sections are used. This means fully utilizing transmission lines, with careful changes in lengths and widths, as well as shunt capacitors. 

  1. Lower device capacitances make broadband circuit matching easier. 

The green curve in for the target impedances is flatter when the device capacitance and the package parasitics are lower. This is dependent on the device technology. 

It is well-established that GaN offers a very low gate capacitance that contributes to its high-frequency capabilities, with faster turn-on and turn-off and lower gate drive losses. The Smith chart in, shows a representation of device output impedance for LDMOS (pink) and GaN (blue). GaN’s lower output capacitance and the smaller package parasitics delivered by Wolfspeed help the output impedances to stay confined against frequency. 

Lower device capacitance (A), higher performance (B) and lower Rth (C)

An examination of the load impedance or load-pull target contours and loci of representative GaN and LDMOS (Figure 3a, right) devices shows that GaN’s contours and movement align better. GaN’s “green arrow” of movement would be shorter, flatter, and therefore easier to match than that of an LDMOS device, with its green arrow a sharper curve. 

This clearly makes GaN the technology of choice for broadband design. 

  1. Higher inherent performance makes target contour areas larger. 

Consider a case where the load-pull contours at a given frequency trace out large areas of the Smith chart. This would mean that the circuit would more easily hit target specs with varying frequency. 

Such generous contours come from higher inherent performance of the device itself— in this case, GaN-on-SiC. The contours have a high peak value and change slowly with changes in impedance. That green arrow of change is flattened. 

Contrast this against the plot for lower performance (Figure 3b, right), which is slightly exaggerated to illustrate the point. Lower-performance circuits have difficulty hitting the target specs at all frequencies. 

  1. Lower thermal impedance increases target contour areas. 

There is a reason why SiC is the technology when high power density is needed: its exceptional thermal conductivity. Against Si’s 1.5 W/cm?K, SiC offers 3.3–4.5 W/cm?K. 

The two Smith charts put this advantage in perspective by comparing two types of GaN technology — GaN-on-SiC on the left and GaN-on-Si on the right. 

The higher thermal impedance of GaN-on-Si means that higher efficiency is needed at any given output power to keep the junction temperature lower than the selected threshold. This explains the smaller area on the chart where target specs are met. 

The evaluation of these characteristics thus confirms GaN-on-SiC as the only technology that offers the capabilities required by the broadband application. 

Wolfspeed’s output design tricks

With the right semiconductor technology and device at hand, Wolfspeed devised an AWR-based design flow, with all steps supporting the goal of building a load network that closely matched the centers of the contours across the required frequency band. 

This meant creating a passive device model with impedances that are the conjugates of the optimal load impedances. A matching network was synthesized to match that model to 50 ?. This then became the amplifier. 

Here are 10 reminders and tips from that experience to ensure success and ease design effort:H 

  1. Examine load-pull data for ZL compromise targets. 

Examine the load-pull data contours to pick impedances near the center of each region that meet the specs for each frequency, as well as ensure that the path these impedances take is monotonic and smooth. 

  1. Output equivalent circuit and output match 

An equivalent circuit representation — not a model — of the device output was created. Then, starting with arbitrary values for R, L, and C, each element was optimized such that a good match was generated to this network-terminated circuit (NTC) port that represents the target load impedances. 

This is preferred over utilizing another NTC port to represent the device output for the few frequencies with ZL data because the eventual circuit synthesized may not meet specs between the frequency points considered. 

The equivalent circuit was then loaded to match it to 50 ?. Optimizing the elements in Output Match creates the desired load impedances at the device plane where the load-pull data was referenced. 

  1. ZL_compromise considerations 

When tabulating ZL_compromise, Zout_target, Zout_equiv_ckt, ZL_compromise, and output equivalent circuit match to ZL (dB) at various frequencies, using more sections in the equivalent circuit model helps broader bandwidth match. For the >1 octave bandwidth requirement, it is recommended to match for better than –15 dB across the band to achieve a good equivalent circuit model. 

  1. Evaluating output match just in decibels can be deceptive. 

When optimizing the output-matching circuit, looking at the output match in decibels does not reveal circuit performance because the load-pull contours may be too steep. Additional evaluation of the impedances at the device plane is necessary to determine device performance when it is loaded. 

  1. Step by step, build up the level of complexity toward EM simulation. 

Simulating to check the impedance the circuit presents to the device at each step, it is recommended to start with the passive equivalent circuit and an MLIN-and-capacitor match, followed by an EM analysis for the output match, then the bias circuit design to add to the EM structure before an EM evaluation of the entire circuit. 

  1. Check projected performance at each level. 

Placing AWR’s GPROBE/GPROBE2 strategically in the circuit makes it easier to check impedances looking in the direction of the load, quickly revealing deviations between the EM structure and the MLIN step. 

  1. Use the following MLIN optimization tricks: 
  • Make the MLIN section closest to the device, longer and wider than lead. 
  • Use step-in-widths between MLIN sections because this adds inductance that needs to be included in the optimization. 
  • Include provisions for a Tee section that will lead to the drain-bias network. 
  • Do not set the output DC blocking cap as an optimized parameter but as series resonant at the highest operating frequency so that it does not behave like an inductor for part of the band. 
  • Avoid extremely wide MLINs even when operating at low impedance — that may not really be the case, as revealed after EM. 
  1. Split the EM structures into substructures. 

When converting MLIN design into EM structures, split them into substructures and ensure they each generate the impedance expected from the MLIN step. Watch for issues from the wide sections close to the device and from sections bending back and around each other. They tend to produce coupling. 

  1. Drain bias should look for an open circuit at the highest frequency. 

For narrowband, the bias line is typically an open circuit looking from the RF match back up the bias line toward the supply. Because the required bandwidth surpassed an octave, the drain bias was designed so that it looks like an open circuit at the highest frequency, with a resonance-free, high-VSWR path around the Smith chart to the low frequency. This technique helped get the most gain, especially at the problematic high frequencies. 

  1. Evaluate how load impedance changes with frequency. 

When bringing all the separate parts together to run EM as a whole, it is prudent to check the trajectory of the load impedance changes with frequency. 

Key takeaways from Wolfspeed’s input

For the input side of the design, Wolfspeed eschewed using the same strategy as on the output side for good reason. And they share three key lessons from their experience: 

  1. It is not recommended to use the same steps for the input as for the output side. 

If a source pull was performed at each frequency to make an equivalent circuit that matched it, the impedances would be too low, and bandwidth would be sacrificed. But running a biased S-parameter analysis on S11 got Wolfspeed close to the impedances predicted by source pulls. Then it was a matter of stabilizing and shaping the response. 

  1. Input match architecture goals are different for broadband. 

While the goal for narrowband is to get high gain and good input return loss across the band, broadband design has other priorities. There is inherently too high a gain at lower frequencies but low gain at higher frequencies that must be addressed to avoid poor gain flatness. The desired response shaping can be achieved by tweaking the return loss at low and high frequencies, taking care to deal with unwanted reflections. 

  1. The DC block method for input matching is not suitable for broadband. 
Input match architecture - Wolfspeed

The typical approach for input matching is with a DC block on the input near the connector. This relies on the matching circuit itself for the gain shaping and return loss, which is difficult with broadband. 

GaN-based designs typically use an RC circuit, with the block in the matching section providing most of the response shaping. The resistance (R) in the RC network helps bring down the gain and stabilize lower frequencies. Smaller capacitance (C) values have higher impedances at low frequencies, thus sending more of the RF signal through R and lowering gain. 

Wolfspeed, however, chose the T-Equalizer architecture because both the resistances in the RC blocks as well as the shunt resistance help stabilize the response. With some tuning, this architecture offers significant flexibility in shaping the response. 

The final evaluation board 

After final evaluations that included checking the design with a 2-W input across the band and doing an EM of the entire circuit to check for unanticipated coupling, Wolfspeed achieved a close match between modeled and measurement results. 

Wolfspeed's CG2H40035F-AMP1