Why is TSMC and ASE competing to protect their position in UHD FO?

Ultra-High-Density Fan-Out (UHD FO) Packaging has started to be commercialized in the market. This advanced packaging market segment has been deeply analyzed by Yole Développement (Yole) and the advanced packaging team with a dedicated report, Fan-Out WLP and PLP Applications and Technologies 2021. In this new technology & market report, the market research & strategy consulting company explains, it delivers cost-effective superior performance, especially for HPC applications such as hyper-scale data centers, and Artificial Intelligence (AI) and Machine Learning, a rapidly growing field. UHD FO performance, cost, and scalability are gaining traction over 2.5D interposers and substrate/PCB. All credit to TSMC, with its inFO_oS, inFO_MS, and inFO_SoW, and ASE, with FoCoS, for intelligently leveraging Fan-Out Packaging Technology. UHD FO now has a cost-optimized position within the high-end end-system applications

The industry has come to accept that advanced node scaling no longer follows Moore’s Law. Hence, FE silicon die sizes are increasing drastically to gain performance. However, processing large FE dies results in yield issues, which are costly, and usually consume a lot of power, which is inefficient. The current trend is to partition a single SoC die into multiple dies and re-configure back with two-die and/or four-die arrangements. The industry players recognize this, and they are starting to split large dies into two or four smaller dies for processing in order to resolve the yield loss and maintain the same bandwidth requirement through UHD FO.

The UHD FO market is forecast to exhibit an impressive growth rate of 20.7% CAGR2020-2026 from $576M in 2020 to $1,777M in 2026. UHD FO wafer volume growth is slower than the revenue, from 315 kwspy to 919 kwpsy at 19.5% CAGR2020-2026. Usually, in packaging, revenue growth is slower than wafer volume growth due to depreciating ASP. Interestingly, the growth of UHD FO revenue outpaces wafer volumes. This is because high-value UHD FO applications are expected to be adopted in Automotive & Mobility and Telecom & Infrastructure by 2022 and 2023.

Creating this new higher level of Fan-Out Packaging is a tall order in terms of know-how, innovation, time, and resources. TSMC and ASE have well-established status as leaders in their fields of expertise in Foundry Packaging and OSAT Advanced Packaging, with solid expertise in Fan-Out Packaging. Therefore, we see both the leaders – ASE in OSAT and TSMC in Foundry – leading the UHD FO market, which is valued at $576M in 2020.

Although ASE and TSMC compete in the same market space, they are not motivated by the same reasons because of their different business models. TSMC has identified a new trend in foundry packaging, adding value by making “now or never” investments in advanced packaging to synergize FE+BE so that the FE business can be protected with critical advanced packaging. This was the key strategic reason why TSMC won Apple’s APE FE and BE business over Samsung. On the other hand, ASE is protecting its interests as an OSAT in Advanced Packaging by pursuing a concentric product diversification strategy to increase exposure and achieve higher business volumes from the Fan-Out Packaging market. This strategy of ASE’s allows more variety and options for their customers. If positioned correctly, this provides a tremendous boost to brand image and company profitability. At the same time, it is also a defensive move. By diversifying into UHD FO, ASE can protect its high-end market share from competing companies,  even such as TSMC. ASE can mitigate risks well where potential is high, and although volumes are not yet secured, this is acceptable in the case of Fan-Out Packaging.

In conclusion, in the UHD FO market, TSMC is safeguarding its FE leading position in Foundry with Advanced Packaging synergy, and ASE is securing high-end business revenue as a leading OSAT.

About the author

Favier Shoo is a Team Lead Analyst in the Packaging team within Semiconductor, Memory and Computing Division at Yole Développement (Yole), part of Yole Group of Companies. Based in Singapore, Favier manages an international team and develops the technical expertise and market know-how within the team. Favier also focuses on the production of technology & market reports, conducts strategic consulting and custom studies. As an acknowledged professional in the semiconductor packaging market space, Favier is regularly engaged in international conferences, with presentations, keynotes, and panel review sessions.
During 7 years at Applied Materials as a Customer Application Technologist in the advanced packaging field, Favier developed an in-depth understanding of the supply chain and core business values. Prior to that, Favier worked at REC Solar as a Manufacturing Engineer to maximize production.
Favier holds a Bachelor’s in Materials Engineering (Hons) and a Minor in Entrepreneurship from Nanyang Technological University (NTU) (Singapore). Favier was also the co-founder of a startup company where he formulated business goals, revenue models and marketing plans.

Stefan CHITORAGA photo

Stefan Chitoraga is a Technology and Market Analyst specializing in Packaging and Assembly at Yole Développement (Yole). As part of the Semiconductor, Memory & Computing division at Yole, Stefan is focused on advanced packaging platforms and processes, substrates, and PCBs. He is involved daily in the production of technology & market reports and custom consulting projects.
Prior to Yole, Stefan served as a Package Design Engineer at Teledyne E2V for 4 years, where he was in charge of the ceramic package and glass lid development for image sensors, developing mechanical design, routing, electrical and thermal simulations.
Stefan holds a Bachelor’s in Electronics and Computer Science for Industry Applications from the Polytech Grenoble (France).

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