iPhone 15: going to the 3rd dimension

Sony’s triple stack image sensors are shaping the future of mobile photography.

This past month, many observers have been commenting on the technical innovation brought by the new iPhone 15 smartphone iteration. A light-folding ’periscope’ camera has appeared for the first time in an iPhone, and the rear LiDAR module has been totally redesigned around a direct time of flight (dToF) solution by Sony.

A new iPhone is always intriguing. Yole SystemPlus’ teardown team reveals and analyses Apple’s technical choices, including the new camera module with the zoom periscope based on sensor-shift image stabilization, the new 3D LiDAR from Sony, new FaceID, 3nm application processor and more… in a dedicated product: Apple iPhone 15 Pro Max – A2849

Meanwhile a greater innovation is concealed deeper in the camera, in the image sensor itself… a buried treasure that is a crucial part of a story that began almost two years ago. Florian Domengie, Senior Technology & Market Analyst at Yole Intelligence and Peter Bonanno, Technology & Cost Analyst at Yole SystemPlus offer you today to deep dive in the Sony’s imaging innovation.

2022 has been a transition year for the CIS industry. In the Status of the CMOS Image Sensor Industry report, Yole Intelligence sees similar revenues to the year before and a slight decline in overall volumes. The company announces a 5.1% CAGR between 2022 and 2028. The CIS market should reach $28.8 billion at the end of the period.

status-of-the-cmos-image-sensor-industry-2023 2022-2028 CMOS image sensors market forecast

However, a significant transformation is underway in the market structure, as evident in the growth of the automotive segment and the increase in the CIS average selling price.

In this dynamic context, the CIS player market shares keep the same path. The top 5 remains the same. Sony is still leading the market with a 42% market share.

A new star is born

In December 2021, Sony had announced for the first time a two-layer transistor CIS that promised to reduce the noise level and increase the dynamic range.

Today, most of the CIS used in smartphone photography employ a 2-wafer stacked structure. The top wafer contains the pixel photodiodes and circuit, and the bottom wafer contains the read out and logic circuit. While this stacked configuration is useful to make compact image sensors with advanced features, it doesn’t address the fundamental issue of performance loss in smaller pixels. As pixel pitch shrinks down, the pixel photodiodes and operating transistors must shrink as well, which leads to a loss in performance.

Peter Bonanno Technology & Cost Analyst, at Yole SystemPlus
By using 2 stacked wafers for the just pixel circuit, more surface can be afforded per pixel, which allows the pixel circuit and its component transistors to be made larger and better performing, especially in terms of noise. One could as well imagine this configuration used to improve higher-complexity pixel circuits such as those used in time-of-flight, global shutter and event-based imaging.

In Sony’s solution, the noise reduction of the 2-layer transistor pixel structure is combined with a full-trench electrical isolation scheme that allows photodiodes to be made larger without excessive loss, granting a significant boost in well capacity.  Together this allows very small pixels to achieve the high dynamic range and low-light performance normally reserved for larger pixels.  By then adding a third wafer to the stack for read-out and logic, Sony’s triple-stack Exmor T structure combines this superior pixel performance with the advanced features expected by today’s smartphone camera designers.

This “triple threat” finally made itself known in May 2023, when Sony released its own Xperia 1 V flagship smartphone and announced the inclusion of the new technology in its main camera. Since then, collaboration has been disclosed with Oppo and Vivo that are adopting Sony Exmor T triple stacked sensors, now part of the Lytia product line, in their Find N3 and X100 series, respectively. The presence of this triple stack technology has also been demonstrated in the iPhone 15. According to renowned camera benchmarker DXOMark, the iPhone 15 has similar camera performance to the iPhone 15 Pro, which uses a larger CIS that Yole Group’s analysts can confirm does not employ the new triple stack structure. This supports the assertion that the Exmor T technology brings big-pixel performance to smaller pixel CIS. 

Will the winner take it all?

From the early announcement, Yole Group have kept a close eye on this innovation as a potential game changer and a potent weapon for Sony to achieve its claimed objective to reach 60% of the CIS market share by 2025. The production of these devices will be certainly supported by the recent investment in their Kumamoto fab.

Florian Domengie Senior Technology and Market Analyst, within the Photonics & Sensing division at Yole Intelligence
Meanwhile the competition has awakened, but only a few players have reacted such as Omnivision and STMicroelectronics. Samsung’s reaction remains to be seen. Having long since mastered stacking in both its memory and imaging products, we would not be surprised to see this player showing their hand soon.

In the race to maintain and gain further market share, triple stack is the new way for technical and performance differentiation. Sony’s entrant has already shown the potential for outsized pixel performance.

Will we soon also see the advantage for compactness and power consumption?

In August 2022, Omnivision announced a three-layer stacked global shutter image sensor dedicated to extended reality applications. Finally, what can this technology offer for data monitoring? STMicroelectronics has published R&D activity related to triple stack technology, what they call “sequential stacking”, where the intermediate layer uses a FDSOI (Fully Depleted Silicon-on-Insulator) architecture, pushing the limits of performance and lower power consumption while leaving more space in the lower logic circuit to embed smarter and more efficient processing capabilities.  More recently, Omnivision proposed using the triple stack structure to combine event-based and normal imaging into the same pixel.

These and other innovations can promise to unlock new sensing paradigms in CIS technology, but challenges remain. The sequential approaches by Sony and STMicroelectronics result in very short and responsive connection lengths but demand careful engineering of the bonding and annealing steps to ensure the formation and simultaneous activation of the two transistor layers.  Omnivision, being fabless, might expect to struggle with such an integrated approach, and their solutions involve adding wafer-level circuit bonding steps, which add another level of manufacturing complexity and yield losses.

status-of-the-cmos-image-sensor-industry-2023 2022 CMOS image sensor industry market share, by player (in % revenue)

The pixel size race is over, the multistacking race begins

After two decades of a race for decreasing the pixel surface size and achieving higher resolutions on smaller chips, the big players have redirected their efforts to the third dimension, looking to wafer stacking as the way forward. These triple stack technologies seem to be the latest expression of the More-than-Moore approach for image sensors, pushing the limits of performance, functionality, and compactness.  In a slowing mobile market and multi-camera adoption, it is sustaining the growth of silicon surface use for imaging into the future for smartphones, and the potential for other sensing applications is clear.

Yole Intelligence estimates that by 2028, 11% of the CIS wafer production could be attributed to multi-stacking. It represents 414k wafers per year.

The automotive imaging market, in its quest for always higher dynamic range and low light sensitivity for its various applications including ADAS, viewing and in-cabin monitoring is surely watching carefully as this story unfolds…

About the authors

Peter Bonanno, PhD., is a Technology & Cost Analyst, at Yole SystemPlus. With strong expertise in the field of imaging, optical sensors and optoelectronics, Peter performs reverse engineering & costing analyses as well as custom projects. He collaborates closely with the laboratory team to create an analysis plan to reveal the device structures, technologies, and manufacturing steps used by leading imaging companies.

Peter holds a Ph.D. in Electrical & Computer Engineering from the Georgia Institute of Technology, (Atlanta, Georgia, USA) and a B.S. in Computer Science and Applied Physics from the New Jersey Institute of Technology (Newark, New Jersey, USA).

Florian Domengie, PhD. is a Senior Technology and Market Analyst, within the Photonics & Sensing division at Yole Intelligence, part of Yole Group. Florian is engaged in the technology and market analyses for various imaging technologies and contributes to the production of the relevant reports and projects.

Prior to Yole, Florian worked in STMicroelectronics in process and technology development fields, and in R&D projects management. Florian has authored and co-authored numerous papers and five patents in semiconductor R&D and manufacturing.

Florian holds a MSc in Engineering Physics, Materials and Microelectronics from INSA Toulouse (France), and a PhD. In Microelectronics and Nanoelectronics from the University of Grenoble-Alpes (France).

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