Chiplets advancing one design breakthrough at a time

An article written by Majeed Ahmad for EDN – What’s the state of chiplet technology today? As the cost advantages of silicon process scaling driven by Moore’s law start to dwindle, will the chiplet approach replace system-on-chip (SoC) designs with multi-die heterogeneous implementations? Are small steps toward implementing chiplet technology sufficient for this landmark semiconductor industry undertaking?

There is no simple answer to these questions yet. But one thing is clear: multi-die architectures are becoming increasingly critical in handling the needs of compute-intensive applications in data centers, cloud computing, and generative artificial intelligence (AI), technologies that require large amounts of memory and fast inter-chip communications.

Then there are automotive and gaming applications that mandate much more reliable and cost-effective solutions than what the current advanced packaging solutions can offer. So, where do the high-performance and highly scalable multi-die architectures for compute-intensive applications actually stand? After years of existence as a small niche, we finally see a few significant breakthroughs in 2023.(…)

The Yole Group estimates that the chiplet-based SIPs market will exceed $135 billion by 2027. However, the economics of adopting a chiplet approach for IC design are tightly linked with the cost and maturity of the interconnect and packaging solutions, noted John Lorenz, senior analyst for computing and software solutions at Yole Intelligence.

Lorenz added that multi-die approaches are more attractive for chip suppliers whose designs must optimize power and bandwidth vectors. “This is especially the case for those in accelerated server computing applications, a market mainly served by data center GPU hardware, and which we see sustaining a 22% CAGR through 2028.”

… Read the full article here.